Basys 3 Board FPGA Pin Assignments for On-Board I/O
Basys 3 Board FPGA Pin Assignments for On-Board I/O

function	FPGA pin		function	FPGA pin		reverse look-up			reverse look-up
LEDs			BUTTONS			FPGA pin	function		FPGA pin	function
LD0	U16		BTNL	W19		E19	LD1		V13	LD8
LD1	E19		BTNR	T17		L1	LD15		V14	LD7
LD2	U19		BTNU	T18		N3	LD13		V15	SW5
LD3	V19		BTND	U17		P1	LD14		V16	SW1
LD4	W18		BTNC	U18		P3	LD12		V17	SW0
LD5	U15					R2	SW15		V19	LD3
LD6	U14		SWITCHES			R3	SW11		V2	SW8
LD7	V14		SW0	V17		T1	SW14		V3	LD9
LD8	V13		SW1	V16		T2	SW10		V4	AN2
LD9	V3		SW2	W16		T3	SW9		V5	CF
LD10	W3		SW3	W17		T17	BTNR		V7	CDP
LD11	U3		SW4	W15		T18	BTNU		V8	CD
LD12	P3		SW5	V15		U1	SW13		W2	SW12
LD13	N3		SW6	W14		U2	AN0		W3	LD10
LD14	P1		SW7	W13		U3	LD11		W4	AN3
LD15	L1		SW8	V2		U4	AN1		W5	Sys Clock
			SW9	T3		U5	CE		W6	CB
DISPLAY (4 digit 7-segment display)			SW10	T2		U7	CG		W7	CA
DISPLAY (4 digit 7-segment display)			SW11	R3		U8	CC		W13	SW7
CA	W7		SW12	W2		U14	LD6		W14	SW6
CB	W6		SW13	U1		U15	LD5		W15	SW4
CC	U8		SW14	T1		U16	LD0		W16	SW2
CD	V8		SW15	R2		U17	BTND		W17	SW3
CE	U5					U18	BTNC		W18	LD4
CF	V5		CLOCKS			U19	LD2		W19	BTNL
CG	U7		system (100 MHz)	W5
CDP	V7		system (100 MHz)	W5
AN0	U2
AN1	U4
AN2	V4
AN3	W4